D-Wave at CSC Digital Disruptions conference

I had an opportunity to present at Computer Sciences Corporation’s Digital Disruptions conference in Falls Church, Virginia last week. The audience was primarily CTOs/CIOs from CSC clients.  I went for a run around the hotel and had a pretty big sense of deja vu, with a weird feeling that I’d been there before. It took awhile but eventually made the connection; DARPA has an office right across the street, which I’d visited when the FOQUS program was being suggested.

A podcast of the talk is available on itunes (I don’t know how to link to it directly, but in itunes search on CSC Leading Edge Forum you will find it), as are the other talks from the conference. You can find the slides there, also I’ve linked to them here 20081029_csc_final.

One of the memes I tried to focus on in this talk was the critical importance of best practices fab in any quantum computer development effort. This is a point that I don’t think is widely appreciated. It simply is not possible to build processors in any way but the one used now in the semiconductor industry. This is unfortunate (because it means that if you’re really serious about trying to build a quantum computer you need to build your own foundry at extreme technical risk, time and expense) but it’s also reality.

Here is a link to a video of the talk.

8 thoughts on “D-Wave at CSC Digital Disruptions conference

  1. after watching ur clip i get the feeling that these CTOs/CIOs are like , well talk to us when your faster then a supercomputer.

    so will a working Rainier start to make that apparent to CTOs/CIOs .

    were showing entanglement with 28 qubit would impress the science crowd more

  2. Pingback: nanoREV. » Blog Archive » D-Wave 128 qubit quantum computers

  3. “It simply is not possible to build processors in any way but the one used now in the semiconductor industry. This is unfortunate (because it means that if you’re really serious about trying to build a quantum computer you need to build your own foundry at extreme technical risk, time and expense) but it’s also reality.”

    Whaaaat? Did you build your own foundry? Or are you building processors the way the semiconductor industry does? Or you are not building quantum computers. Clarify, please.

  4. Hi Charles

    Yes we developed our own foundry, and yes it was developed within and uses semiconductor best practices. It is the first production superconducting fab. Currently the process is a planarized 4 niobium layer, 0.25 micron, with TiPt resistor module, 0.6 micron Nb/AlOx/Nb via junctions.

    • Thank you for the prompt reply.

      So the layers of niobium are 250 nm thick, and the feature size on surface of a layer is 60 nm. Is that what you are telling me?

      I am only interested in these dimensions for the sake of comparison with commercial silicon, and then only so I have some vague idea of what’s going on.

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